Intel to extend Moore's Law with new chips in 2007

Stan Beer
Sunday, 28 January 2007 07:25

Your IT - Home IT

The laws of physics have threatened to bring Moore's Law to a grinding halt as transistors are shrunken to the size of a few atoms. However, Intel says it will bring new 45nm chip technology to market in 2007 that will continue to allow it to double the number of transistors on a processor. IBM plans to follow suit with its own solution in 2008.

Moore's Law, which stipulates that the number of transistors will double on chips about every two years, was facing the spectre of breakdown because of the increasing leakage of current as transistors get smaller and the layer of insulating silicon layer inside them gets thinner.

Intel has shrunk the silicon dioxide gate dielectric to as little as 1.2nm thick – equal to five atomic layers – on its 65nm process technology, but the continued shrinking has led to increased current leakage through the gate dielectric, resulting in wasted electric current and unnecessary heat.

To overcome the problem of current leakage across super thin layer of silicon, Intel is using new materials to build the insulating walls and switching gates of its 45nm transistors. Intel says the new technology will dramatically reduce leakage and allow double the amount of transistors to be placed on the same sized chips.

The new material has a property Intel calls high-k, for the transistor gate dielectric, and a new combination of metal materials for the transistor gate electrode.

Intel replaced the silicon dioxide with a thicker hafnium-based high-k material in the gate dielectric, which it claims reduces leakage by more than 10 times compared to the silicon dioxide used for more than four decades.

Because the high-k gate dielectric is not compatible with today’s silicon gate electrode, the second part of Intel’s 45nm transistor material recipe is the development of new metal gate materials. Intel will use a proprietary combination of different metal materials for the transistor gate electrodes.{mospagenreak}

According to Intel, the combination of the high-k gate dielectric with the metal gate for 45nm chips provides more than a 20% increase in drive current, or higher transistor performance, and reduces current leakage by more than five times, thus improving the energy efficiency of the transistor.

Intel also claims its 45nm process technology improves transistor density by approximately twice that of the previous generation. Because the 45nm transistors are smaller than the previous generation, they take less energy to switch on and off, reducing active switching power by approximately 30%, Intel claims.

“The implementation of high-k and metal materials marks the biggest change in transistor technology since the introduction of polysilicon gate MOS transistors in the late 1960s,” said Intel Co-Founder Gordon Moore, after whom Moore's Law was named.

According to Intel, its new technology has not only ensured that Moore's Law will continue to govern chip progress the next decade but it has extended its lead of more than a year over the rest of the semiconductor industry.

The first working 45nm processors of its next-generation 45nm family of products, codenamed Penryn, will be inside the next generation Intel Core 2 Duo, Intel Core 2 Quad and Xeon families of multi-core processors. Intel also said it has five early-version products up and running – the first of fifteen 45nm processor products planned from the company.

“As more and more transistors are packed onto a single piece of silicon, the industry continues to research current leakage reduction solutions,” said Mark Bohr, Intel senior fellow. “Meanwhile our engineers and designers have achieved a remarkable accomplishment that ensures the leadership of Intel products and innovation. Our implementation of novel high-k and metal gate transistors for our 45nm process technology will help Intel deliver even faster, more energy efficient multi-core products that build upon our successful Intel Core 2 and Xeon family of processors, and extend Moore’s Law well into the next decade.”

Earlier this month, Hewlett-Packard announced it had developed a new type of nano-scale architecture developed in the research labs of Hewlett-Packard that could beat Moore's Law and that would enable chip makers to pack eight times as many transistors as is currently possible on a standard 45nm field programmable gate array (FPGA) chip. The new HP technology, however, leaves transistors unchanged but removes the signal routing wires from the silicon, leaving more room for logic processing transistors.