Stephen Withers
Friday, 06 June 2008 07:42
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The IBM/Fraunhofer team have demonstrated a prototype cooling layer that could be incorporated in a chip stack. The 100 micron high layer contains hair-sized (50 micron) 'pipes', yet provides 10,000 vertical interconnects per square centimetre. (Remember, one of the reasons for stacking chips is to provide large numbers of interconnects between the layers.)
The design uses conventional chip fabrication techniques, with a silicon oxide layer to electrically insulate the water. A new thin-film soldering technique was needed to attach the cooling layer to the other components of the stack.
Earlier this year, scientists at IBM's Zurich laboratory revealed a scheme that would put to good use around three-quarters (and possibly more with further development) of the electrical energy used by data centres and currently wasted as heat.
The idea is to use hot water for cooling. That sounds contradictory, but if the incoming water starts at 45 degrees centigrade, it can still cool chips to their normal working temperature of 85 degrees. The trick is that the outflow is then over 50 degrees, which is hot enough to be used by municipal heating networks.