Tilera seeks processor performance crown with 64-cores

Alex Zaharov-Reutt
Monday, 20 August 2007 16:49

Opinion and Analysis

Part of Tilera’s success in integrating so many cores is thanks to the development of the iMesh Interconnect. Instead of working with a central memory unit through which all chip communications must pass, as is the case with existing multi-core technologies, Tilera’s technology is designed to eliminate this bottleneck.

Tilera say that they place a “communications switch on each processor core and arranging them in a grid fashion on the chip”, creating “an efficient 2-dimensional traffic system for packets, much like the layout of a modern city's streets”, enabling “better aggregate bandwidth, shorter distance between cores and delivering excellent performance with ultra-lower power consuming”.

As has been the case with existing dual and quad-core processors, getting programmers to write software that best takes advantage of the multiple cores now on offer is proving to be the most difficult part of the transition to a multi-core world, but as with all new developments, programmers are responding to the new reality and are learning to program accordingly.

Now that we live in a multi-core world, with hundreds and thousands more cores to soon become standard on computers everywhere, the problem of programs optimized only for a single core will soon become a problem of the past, especially when you consider that Tilera’s 64-core TILE64 is available today.

Tilera say that the TILE64 starts at US $435 each in units of 10,000, and will in the future be joined by 36-core and 120-core models.

No doubt it will spur Intel, AMD, IBM, Texas Instruments and other chip manufacturers to ramp up their production timelines and R&D to nullify whatever advatange Tilera has as quickly as possible, resulting in better technology for us all, faster, although any kind of multi-core computing utopia is still likely many decades away.

Until then, live long, multi-core, and propser!